Prof. Tony Chan Carusone directs research at ISL. He has taught and researched integrated circuits and systems at the University of Toronto since completing his Ph.D. here in 2002. He and his graduate students have received eight best-paper awards at leading conferences for their work on chip-to-chip and optical communication circuits, analog-to-digital conversion, and precise clock generation. Prof. Chan Carusone was a Distinguished Lecturer for the IEEE Solid-State Circuits Society and has co-authored the classic textbooks “Analog Integrated Circuit Design” along with D. Johns and K. Martin, and “Microelectronic Circuits” along with A. Sedra and K.C. Smith. In 2022, he was named a Fellow of the IEEE for “contributions to integrated circuits for digital communication”.
Current ISL Members
Name: Bahaa Radi
Position: Post-Doctoral Fellow
Research: Optical Communication Receiver Design and Optimization
Contact: bahaa.radi@isl.utoronto.ca
LinkedIn profile
Name: Ahmad Hassan
Position: Post-Doctoral Fellow
Research: Integrated Circuit Architectures for Photonic Computing
Contact: ahmad.hassan@isl.utoronto.ca
LinkedIn profile
Name: Foad Arvani
Position: Post-Doctoral Fellow
Research: 3D Imaging
Contact: foad.arvani@isl.utoronto.ca
Name: Ming Yang
Position: Ph.D. Candidate
Research: Signal Processing for Next-Generation Wireline Communication
Contact: ming.yang@isl.utoronto.ca
Name: Wagih Ismail
Position: Ph.D. Candidate
Research: Broadband Wireless Receiver A/D Conversion
Contact: wagih.ismail@isl.utoronto.ca
Name: Dhruv Patel
Position: Ph.D. Candidate
Research: CMOS Optical Receiver Circuits
Contact: dhruv.patel@isl.utoronto.ca
Web Link
Name: Durand Jarrett-Amor
Position: Ph.D. Candidate
Research: Highly Parallel Wireline Communication
Contact: durand.jarrettamor@isl.utoronto.ca
Web Link
Name: Rudraneil Saha
Position: Ph.D. Candidate
Research: CMOS Broadband Wireless Communication Circuits
Contact: rudraneil.saha@isl.utoronto.ca
Name: Chris Li
Position: Ph.D. Candidate
Contact: zonghao.li@isl.utoronto.ca
Name: Deng Pan
Position: M.A.Sc. Candidate
Research: Integrated Circuit Acceleration of Machine Learning
Contact: deng.pan@isl.utoronto.ca
Web Link
Name: Behraz Vatankhahghadim
Position: Ph.D. Candidate
Research: Signal Processing for Next Generation Wireline Communication
Contact: behraz.vatankhahghadim@isl.utoronto.ca
Name: Kunal Yadav
Position: Ph.D. Candidate
Contact: kunal.yadav@isl.utoronto.ca
Name: Ali Sadr
Position: Ph.D. Candidate
Contact:ali.sadr@isl.utoronto.ca
LinkedIn profile
Name: Pooya Poolad
Position: Ph.D. Candidate
Contact:pooya.poolad@isl.utoronto.ca
Name: Bender Yang
Position: Ph.D. Candidate
Contact:bender.yang@isl.utoronto.ca
Name: Jiaqi Wu
Position: M.A.Sc. Candidate
Contact:jiaqi.wu@isl.utoronto.ca
Group Photo, 2021
Past Students
Name |
Position |
Research |
More Info |
| Foad Arvani | Ph.D. | RO-based TDC Design with Configurable Resolution and Power for SPAD-based TCSPC LiDAR Applications | Link to thesis LinkedIn profile |
| Luke Wang | Ph.D. | ADC-based Receivers for Wireline Communication | Link to thesis LinkedIn profile |
| Jeffrey Wang | Ph.D. | Adaptive Blocker Cancellation for Wireless Receivers | Link to thesis LinkedIn profile |
| Alireza Sharif-Bakhtiar | Ph.D. | Low-Power High Speed Optical Links in CMOS | Link to thesis LinkedIn profile |
| Behzad Dehlaghi | Ph.D. | Parallel Ultra-Short Reach Die-to-Die Links | Link to thesis LinkedIn profile |
| Shayan Shahramian | Ph.D. | Adaptive Decision Feedback Equalization With Continuous-Time Infinite Impulse Response Filters | Link to thesis LinkedIn profile |
| Amer Samarah | Ph.D. | Improved Phase Detection for Digital Phase Locked Loops | Link to thesis LinkedIn profile |
| Kevin Banovic | Ph.D. | Mixed-Signal Architectures for Spectrum Sensing | Link to thesis LinkedIn profile |
| Dustin Dunwell | Ph.D. | Adaptive Receivers for High-Speed Wireline Links | Download thesis LinkedIn profile |
| Kentaro Yamamoto | Ph.D. | A 1-1-1-1 MASH Delta-Sigma ADC using Dynamic Comparator-based OTAs | Link to thesis LinkedIn profile |
| Mike Bichan | Ph.D. | Parallel chip-to-chip I/O | Link to thesis LinkedIn profile |
| Shahriar Shahramian | Ph.D. | Ultra-high-speed A/D conversion | Link to thesis LinkedIn profile |
| Masum Hossain | Ph.D. | Low-power Multi-Gbps Wireline Communication | Link to thesis Faculty page at U. Alberta |
| Ahmad Darabiha | Ph.D. | High-throughput low-density parity check decoders | Download thesis LinkedIn profile |
| Faisal Musa | Ph.D. | High-speed baud-rate clock recovery | Link to thesis LinkedIn profile |
| Qingnan Yu | M.A.Sc. | Digital Algorithms for Quantized Analog Signal Processing | Link to thesis LinkedIn profile |
| Danny Zhang | M.A.Sc. | A TX Clock Frequency Modulated Side-Channel and a Time-Modulted Phase Interpolator for High-Speed Wireline Systems | Link to thesis LinkedIn profile |
| Dhruv Patel | M.A.Sc. | Co-packaged 100+ Gbps Optical Communication Receiver Front-ends in FinFET CMOS | Link to thesis Personal Web |
| Danial Mohammadi | M.A.Sc. | Continuous-time Pipelined Binary-search Flash ADC | Link to thesis LinkedIn profile |
| Paul Chen | M.A.Sc. | All-digital Calibration Algorithms for the Correction of Static Non-linearities in ADCs | Link to thesis LinkedIn profile |
| Yue Yin | M.A.Sc. | The Role of Voltage Regulation in Power Integrity for Multi-Gbps Parallel I/O Interfaces | Link to thesis LinkedIn profile |
| Nadeesha Amarasinghe | M.A.Sc. | A Single-ended Simultaneously Bidirectional Transceiver for Ultra-short Reach Die to Die Links | Link to thesis LinkedIn profile |
| Masumi Shibata | M.A.Sc. | CMOS VCSEL Driver Circuit for 25+Gbps/channel Short-reach Parallel Optical Links | Link to thesis LinkedIn profile |
| Victor Kozlov | M.A.Sc. | Capacitively-Coupled CMOS VCSEL Driver Circuits for Optical Communication | Link to thesis LinkedIn profile |
| Jeffrey Wang | M.A.Sc. | A 1.25GS/S 8-bit Time-Interleaved C-2C SAR ADC for Wireline Receiver Applications | Link to thesis Web Link |
| Luke Wang | M.A.Sc. | Timing Skew Calibration for Time Interleaved Analog to Digital Converters | Link to thesis Web Link |
| Alain Rousson | M.A.Sc. | A 2-lane 2Gbps optical receiver with integrated photodiodes in 90nm CMOS | Link to thesis LinkedIn profile |
| Hemesh Yasotharan | M.A.Sc. | High-performance CMOS photo-receivers | Link to thesis LinkedIn profile |
| Tony Kao | M.A.Sc. | A 5-Gbps Optical Receiver with Monolithically Integrated Photodetector in 0.18-um CMOS | Download thesis LinkedIn profile |
| Peter Park | M.A.Sc. | A 4PAM/2PAM coaxial cable receiver analog front-end targeting 40Gb/s in 90-nm CMOS | Link to thesis |
| George Ng | M.A.Sc. | Distributed Circuit Techniques for Equalization of Short Multimode Fiber Links | Link to thesis |
| Horace Cheng | M.A.Sc. | A 4PAM/2PAM Coaxial Cable Driver Targeting 40Gb/s in 0.13µm CMOS | Download thesis |
| Jennifer Pham | M.A.Sc. | Time-interleaved DS-DAC for Broadband Wireless Applications | Download thesis |
| Kentaro Yamamoto | M.A.Sc. | A programmable delta-sigma ADC | Download thesis |
| Mike Bichan | M.A.Sc. | Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links | Download thesis |
| Adesh Garg | M.A.Sc. | A 1-tap 40-Gbps look-ahead decision feedback equalizer in SiGe BiCMOS | Download thesis |
| Jonathan Sewter | M.A.Sc. | Electronic equalization of polarization-mode dispersion in 40-Gb/s optical systems | Download thesis |
| Xunjun Mo | M.Eng. | Jitter in CMOS Global Clock Distribution | LinkedIn Profile |
| Sabrina Liao | B.A.Sc. | Broadband CMOS Digitally-controlled Oscillators | LinkedIn profile |
| Michael Georgas | B.A.Sc. | A Genetic Algorithm for the Design of Passive Filters and a Distributed Amplifier | Download thesis LinkedIn profile |
| Denis Daly | B.A.Sc. | Direct GMSK generation using delta-sigma modulation | Download thesis LinkedIn profile |
| Shuai Chen | Post-Doctoral Fellow | Optical CMOS Receiver for VCSEL-Based PAM Links | Institute of Computing Technology, Chinese Academy of Sciences |
| Nijwm Wary | Post-Doctoral Fellow | Wireline Communication Links and Transceivers | IIT Bhubaneswar |