Energy-Efficient Interconnect

This research thrust looks at the major challenge facing computer and networking systems now and for the next decade: interconnect energy efficiency. Aggregate interconnect input-output (I/O) bandwidth must increase aggressively to take full advantage of tomorrow’s highly parallel processors, but the total power available for I/O is constrained.

In particular, network data traffic patterns pose a difficult problem: how do we maintain energy efficiency in the presence of widely-varying bandwidth demands? No single strategy appears to offer the energy-efficiency improvements that will be required in the next decade. Rather, the entire system must be co-optimized including the channel, transmitter, receiver, and clocking circuits, with the objective function being energy consumption per communicated bit. This optimized system must then exploit a combination of power management techniques including burst-mode operation, low-power standby, dynamic voltage and frequency scaling, and dynamic link narrowing.

Our research looks at several possible solutions. The potential for impact is tremendous. Worldwide, 220 TWh per year of power goes into compute servers, and interface power is a very significant fraction of that, ranging from 10% – 25% depending upon the computing load present. A research result that can shave 1% off of the interface power alone (i.e. 0.1% of total server power), would provide a reduction in electricity consumption equivalent to 20,000 homes. We are currently exploring techniques that promise reductions much greater than 1%!

Obtained under a CC license from here.